In this post we are going to research a digital stop watch design set up around the extremely popular IC LM555 in combination with a 4-digit counter IC with multiplexed 7-segment output drivers (MM74C926).
IC MM74C926 is internally comprised of a 4-digit counter, an output latch up phase, a npn output accountable for sourcing driver networks for common-cathode, 7-segment display and an internal multiplexing circuitry with four multiplexing outputs.
The multiplexing circuit phase also contains an in-built free running oscillator, and does not depend on any extra external frequency producing network.
The counter was created to move forward on a negative rising of the clock signals.
The clock signal is designed by the timer IC LM555 (IC1) and amazed over pin 12 of IC2.A higher signal on reset pin 13 of IC2 resets the IC to zero logic.
Reset pin 13 is connected with +5V by way of a reset push-on-switch S3.
The instance S2 is is pressed even for a fraction of a second, the count figure is offered to a zero logic, transistor T1 relates with a trigger and it resets IC1.
This enforces the counting to begin in a scenario in which S2 is within ‘off’ condition.
A low logic signal on the latch-enable input pin 5 (LE) of IC2 latches the count in the counter module into the on chip set output latches.
In an event when switch S2 is turned on, pin 5 is compelled to go low and thereby the count figure is permitted to be saved in the latch section of the IC.
Display-select pin 6 (DS) ascertains if the figure on the counter or the saved count in the latch might be presented on the display or not.
In the event pin 6 is held low the figure in the output latch section is permitted to get shown, in spite of this if pin 6 is offered with a high logic the count stored in the counter is lit up over the attached display.
On an situation when switch S2 is turned, the base of pnp transistor T2 is connected with ground making sure it commences working. The emitter of T2 is rigged with DS pin of IC2.
Accordingly, at any time switch S3 is turned on, reset pin 13 of IC2 is combined with negative by means of the transistor T1 making certain that the oscillator is inhibited from producing clock pulses. This process is implemented to apply a synchronization between IC1 and IC2.
At the first stage, reset the module with the intention to allow the display to display ‘0000.’ Subsequent disconnect switch S2 for the stop watch to start its counting the periods. For those who desired to slow down the clocking of the chip, simply disconnect the control S2.
The presented rotary switch S1 might be selected locating the a number of time intervals at the output of the astable multivibrator (IC1).
The design is appropriate off a 5V supply inputs. The circuit might be very easily set and developed on a general-purpose PCB.
You may be tempted to enclose the whole circuit in a metallic cabinet with slots built for four 7-segment displays, rotary switch S1, start/stop switch S2 and reset switch S3 in the dashboard plate of the chosen encloser.
IC MM74C926 is internally comprised of a 4-digit counter, an output latch up phase, a npn output accountable for sourcing driver networks for common-cathode, 7-segment display and an internal multiplexing circuitry with four multiplexing outputs.
The multiplexing circuit phase also contains an in-built free running oscillator, and does not depend on any extra external frequency producing network.
The counter was created to move forward on a negative rising of the clock signals.
The clock signal is designed by the timer IC LM555 (IC1) and amazed over pin 12 of IC2.A higher signal on reset pin 13 of IC2 resets the IC to zero logic.
Reset pin 13 is connected with +5V by way of a reset push-on-switch S3.
The instance S2 is is pressed even for a fraction of a second, the count figure is offered to a zero logic, transistor T1 relates with a trigger and it resets IC1.
This enforces the counting to begin in a scenario in which S2 is within ‘off’ condition.
A low logic signal on the latch-enable input pin 5 (LE) of IC2 latches the count in the counter module into the on chip set output latches.
In an event when switch S2 is turned on, pin 5 is compelled to go low and thereby the count figure is permitted to be saved in the latch section of the IC.
Display-select pin 6 (DS) ascertains if the figure on the counter or the saved count in the latch might be presented on the display or not.
In the event pin 6 is held low the figure in the output latch section is permitted to get shown, in spite of this if pin 6 is offered with a high logic the count stored in the counter is lit up over the attached display.
On an situation when switch S2 is turned, the base of pnp transistor T2 is connected with ground making sure it commences working. The emitter of T2 is rigged with DS pin of IC2.
Accordingly, at any time switch S3 is turned on, reset pin 13 of IC2 is combined with negative by means of the transistor T1 making certain that the oscillator is inhibited from producing clock pulses. This process is implemented to apply a synchronization between IC1 and IC2.
At the first stage, reset the module with the intention to allow the display to display ‘0000.’ Subsequent disconnect switch S2 for the stop watch to start its counting the periods. For those who desired to slow down the clocking of the chip, simply disconnect the control S2.
The presented rotary switch S1 might be selected locating the a number of time intervals at the output of the astable multivibrator (IC1).
The design is appropriate off a 5V supply inputs. The circuit might be very easily set and developed on a general-purpose PCB.
You may be tempted to enclose the whole circuit in a metallic cabinet with slots built for four 7-segment displays, rotary switch S1, start/stop switch S2 and reset switch S3 in the dashboard plate of the chosen encloser.
No comments:
Post a Comment